MIB Viewer

shelfBusClockSource

OBJECT-TYPE
1.3.6.1.4.1.562.2.4.1.13.3.11.1.1
Access
read-only
Status
mandatory
Sub-identifiers
0
This attribute records the source of the fundamental clock signal and end-of-cell synchronization signal used by the bus. It contains one of the following values. activeCP: the card which is the active control processor (CP) is providing clock signals alternate: the card at the opposite end of the module from the active CP is providing clock signals
INTEGER { activeCP(0), alternate(1) }