MIB Viewer

svrDevCPUAffinity

OBJECT-TYPE
1.3.6.1.4.1.36.2.18.22.1.6.9.1.7
Access
read-only
Status
mandatory
Sub-identifiers
0
Bit map describing processors to which interrupts are dispatched. Use first IRQL entry if they are different. Bit position = cpu # starting from Least Significant Bit (LSB).
INTEGER